And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths . boundary scan is designed according to ieee1149 . 1 , and some other instructions such as degug , runbist are provided to support internal fault testing , online debugging and built - in self - test besides the several necessary insructions . internal scan is implemented by partial scan , through this the boundary of logic component and user - cared system registers can be selected to be scanned
2.
As key technology of the single chip calculator , the highly integrated dynamic cmos logic implement and the micro program design are now owned only by the developed countries and kept in secret . based on the conjunction of " top - down " and " bottom - up " design approach , the hardware system and micro program design of the calculator is thoroughly studied in this paper , and finally has been mastered
3.
The author is absorbed in research on technology of coprocessor design . in the floating - point addition the paper proposes a carry chain of dynamic and static mixed circuits and a good balance between speed and area of predicting leading - zero logic circuits , considering algorithm and construction of logic circuits . an approach of micro program controller design for coprocessor is put forward and a test bench is given to verify its function
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